A novel pulse width modulation sampling process for low power, low distortion digital Class D amplifiers

Publication Type  Conference Paper
Year of Publication  2000
Authors  Li, H; Gwee, BH; Chang, JS; Tan, MT
Conference Name  Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Volume  1
Pagination  514-517
Conference Start Date  08/08/2000
ISBN Number  0-7803-6475-9
Key Words  amplifiers; harmonic distortion; low-power electronics; pulse width modulation; sampling methods
Abstract  A PWM sampling process for low-power digital Class D amplifiers with low harmonic distortion is proposed. By means of a novel algorithm, the Natural Sampling Process is emulated through a Delta-Compensation Uniform Sampling Process. This algorithm features a simple circuit implementation (small IC area), low power operation (low sampling rate) and a highly desirable low harmonic distortion.
URL  http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=951696
DOI  10.1109/MWSCAS.2000.951696
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